Lines Matching defs:hi35xx
82 static int32_t I2cDumperAddDatas(const struct Hi35xxI2cCntlr *hi35xx)
85 {"HI35XX_I2Cx_GLB", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_GLB)},
86 {"HI35XX_I2Cx_SCL_H", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_SCL_H)},
87 {"HI35XX_I2Cx_SCL_L", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_SCL_L)},
88 {"HI35XX_I2Cx_DATA1", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_DATA1)},
89 {"HI35XX_I2C_TXF", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_TXF)},
90 {"HI35XX_I2C_RXF", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_RXF)},
91 {"HI35XX_I2C_CTRL2", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_CTRL2)},
92 {"HI35XX_I2C_STAT", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_STAT)},
93 {"HI35XX_I2C_INTR_RAW", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_INTR_RAW)},
94 {"HI35XX_I2C_INTR_EN", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_INTR_EN)},
95 {"HI35XX_I2C_INTR_STAT", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_INTR_STAT)},
98 if (hi35xx->dumper == NULL) {
102 return PlatformDumperAddDatas(hi35xx->dumper, datas, sizeof(datas) / sizeof(struct PlatformDumperData));
105 static int32_t I2cDumperCreate(struct Hi35xxI2cCntlr *hi35xx)
117 I2C_DUMPER_NAME_PREFIX, hi35xx->bus) < 0) {
129 hi35xx->dumper = dumper;
130 hi35xx->dumperName = name;
135 static inline void I2cDumperDestroy(struct Hi35xxI2cCntlr *hi35xx)
137 PlatformDumperDestroy(hi35xx->dumper);
138 OsalMemFree(hi35xx->dumperName);
141 static void I2cDumperDump(const struct Hi35xxI2cCntlr *hi35xx, const char *executor, int srcLine)
148 ret = PlatformDumperAddData(hi35xx->dumper, &header);
153 ret = I2cDumperAddDatas(hi35xx);
157 (void)PlatformDumperDump(hi35xx->dumper);
158 (void)PlatformDumperClearDatas(hi35xx->dumper);
161 static inline void Hi35xxI2cHwInitCfg(struct Hi35xxI2cCntlr *hi35xx)
163 unsigned long busId = (unsigned long)hi35xx->bus;
169 static inline void Hi35xxI2cEnable(const struct Hi35xxI2cCntlr *hi35xx)
173 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_GLB);
175 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_GLB);
178 static inline void Hi35xxI2cDisable(const struct Hi35xxI2cCntlr *hi35xx)
182 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_GLB);
184 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_GLB);
187 static inline void Hi35xxI2cDisableIrq(const struct Hi35xxI2cCntlr *hi35xx, unsigned int flag)
191 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_EN);
193 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_INTR_EN);
196 static inline void Hi35xxI2cCfgIrq(const struct Hi35xxI2cCntlr *hi35xx, unsigned int flag)
198 OSAL_WRITEL(flag, hi35xx->regBase + HI35XX_I2C_INTR_EN);
201 static inline void Hi35xxI2cClrIrq(const struct Hi35xxI2cCntlr *hi35xx)
203 (void)OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_STAT);
204 OSAL_WRITEL(INTR_ALL_MASK, hi35xx->regBase + HI35XX_I2C_INTR_RAW);
207 static void Hi35xxI2cSetFreq(struct Hi35xxI2cCntlr *hi35xx)
214 freq = hi35xx->freq;
215 clkRate = hi35xx->clk;
219 hi35xx->freq = maxFreq;
220 freq = hi35xx->freq;
224 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_SCL_H);
225 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_SCL_L);
228 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_SCL_H);
230 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_SCL_L);
232 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_GLB);
235 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_GLB);
238 static inline void Hi35xxI2cSetWater(const struct Hi35xxI2cCntlr *hi35xx)
240 OSAL_WRITEL(I2C_TXF_WATER, hi35xx->regBase + HI35XX_I2C_TX_WATER);
241 OSAL_WRITEL(I2C_RXF_WATER, hi35xx->regBase + HI35XX_I2C_RX_WATER);
247 static void Hi35xxI2cSetAddr(const struct Hi35xxI2cCntlr *hi35xx, const struct Hi35xxTransferData *td)
267 OSAL_WRITEL(addr, hi35xx->regBase + HI35XX_I2C_DATA1);
270 static inline void Hi35xxI2cCmdregSet(const struct Hi35xxI2cCntlr *hi35xx, unsigned int cmd, unsigned int *offset)
273 OSAL_WRITEL(cmd, hi35xx->regBase + HI35XX_I2C_CMD_BASE + *offset * HI35XX_REG_SIZE);
277 static void Hi35xxI2cCfgCmd(const struct Hi35xxI2cCntlr *hi35xx, const struct Hi35xxTransferData *td)
282 Hi35xxI2cCmdregSet(hi35xx, (td->index == 0) ? CMD_TX_S : CMD_TX_RS, &offset);
285 Hi35xxI2cCmdregSet(hi35xx, CMD_TX_D1_2, &offset);
287 Hi35xxI2cCmdregSet(hi35xx, CMD_TX_D1_1, &offset);
290 Hi35xxI2cCmdregSet(hi35xx, CMD_TX_D1_1, &offset);
293 Hi35xxI2cCmdregSet(hi35xx, (msg->flags & I2C_FLAG_IGNORE_NO_ACK) ? CMD_IGN_ACK : CMD_RX_ACK, &offset);
296 OSAL_WRITEL(offset, hi35xx->regBase + HI35XX_I2C_DST1);
297 OSAL_WRITEL(msg->len - HI35XX_I2C_R_LOOP_ADJ, hi35xx->regBase + HI35XX_I2C_LOOP1);
298 Hi35xxI2cCmdregSet(hi35xx, CMD_RX_FIFO, &offset);
299 Hi35xxI2cCmdregSet(hi35xx, CMD_TX_ACK, &offset);
300 Hi35xxI2cCmdregSet(hi35xx, CMD_JMP1, &offset);
302 Hi35xxI2cCmdregSet(hi35xx, CMD_RX_FIFO, &offset);
303 Hi35xxI2cCmdregSet(hi35xx, CMD_TX_NACK, &offset);
305 OSAL_WRITEL(offset, hi35xx->regBase + HI35XX_I2C_DST1);
306 OSAL_WRITEL(msg->len - 1, hi35xx->regBase + HI35XX_I2C_LOOP1);
307 Hi35xxI2cCmdregSet(hi35xx, CMD_UP_TXF, &offset);
308 Hi35xxI2cCmdregSet(hi35xx, CMD_TX_FIFO, &offset);
310 Hi35xxI2cCmdregSet(hi35xx, (msg->flags & I2C_FLAG_IGNORE_NO_ACK) ? CMD_IGN_ACK : CMD_RX_ACK, &offset);
311 Hi35xxI2cCmdregSet(hi35xx, CMD_JMP1, &offset);
317 Hi35xxI2cCmdregSet(hi35xx, CMD_TX_P, &offset);
320 Hi35xxI2cCmdregSet(hi35xx, CMD_EXIT, &offset);
326 static inline void Hi35xxI2cStartCmd(const struct Hi35xxI2cCntlr *hi35xx)
330 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_CTRL1);
332 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL1);
335 static void Hi35xxI2cRescure(const struct Hi35xxI2cCntlr *hi35xx)
341 Hi35xxI2cDisable(hi35xx);
342 Hi35xxI2cCfgIrq(hi35xx, 0);
343 Hi35xxI2cClrIrq(hi35xx);
346 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
352 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
357 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
368 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_CTRL2);
372 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
375 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
380 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
384 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
388 static int Hi35xxI2cWaitRxNoempty(const struct Hi35xxI2cCntlr *hi35xx)
394 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_STAT);
401 Hi35xxI2cRescure(hi35xx);
403 __func__, OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_RAW), val);
404 I2cDumperDump(hi35xx, __func__, __LINE__);
408 static int Hi35xxI2cWaitTxNofull(const struct Hi35xxI2cCntlr *hi35xx)
414 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_STAT);
421 Hi35xxI2cRescure(hi35xx);
423 __func__, OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_RAW), val);
424 I2cDumperDump(hi35xx, __func__, __LINE__);
428 static int32_t Hi35xxI2cWaitIdle(const struct Hi35xxI2cCntlr *hi35xx)
434 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_RAW);
445 Hi35xxI2cRescure(hi35xx);
447 __func__, val, OSAL_READL(hi35xx->regBase + HI35XX_I2C_STAT));
448 I2cDumperDump(hi35xx, __func__, __LINE__);
474 static int32_t Hi35xxI2cXferOneMsgPolling(const struct Hi35xxI2cCntlr *hi35xx, const struct Hi35xxTransferData *td)
483 Hi35xxI2cEnable(hi35xx);
484 Hi35xxI2cDisableIrq(hi35xx, INTR_ALL_MASK);
485 Hi35xxI2cClrIrq(hi35xx);
486 Hi35xxI2cSetAddr(hi35xx, td);
487 Hi35xxI2cCfgCmd(hi35xx, td);
488 Hi35xxI2cStartCmd(hi35xx);
492 status = Hi35xxI2cWaitRxNoempty(hi35xx);
496 val = (uint8_t)OSAL_READL(hi35xx->regBase + HI35XX_I2C_RXF);
506 status = Hi35xxI2cWaitTxNofull(hi35xx);
515 OSAL_WRITEL((unsigned int)val, hi35xx->regBase + HI35XX_I2C_TXF);
520 status = Hi35xxI2cWaitIdle(hi35xx);
522 Hi35xxI2cDisable(hi35xx);
527 static void Hi35xxI2cCntlrInit(struct Hi35xxI2cCntlr *hi35xx)
529 Hi35xxI2cHwInitCfg(hi35xx);
530 Hi35xxI2cDisable(hi35xx);
531 Hi35xxI2cDisableIrq(hi35xx, INTR_ALL_MASK);
532 Hi35xxI2cSetFreq(hi35xx);
533 Hi35xxI2cSetWater(hi35xx);
534 I2cDumperDump(hi35xx, __func__, __LINE__);
535 HDF_LOGI("%s: cntlr:%hd init done!", __func__, hi35xx->bus);
541 struct Hi35xxI2cCntlr *hi35xx = NULL;
548 hi35xx = (struct Hi35xxI2cCntlr *)cntlr;
559 ret = Hi35xxI2cXferOneMsgPolling(hi35xx, &td);
574 struct Hi35xxI2cCntlr *hi35xx = (struct Hi35xxI2cCntlr *)cntlr;
575 if (hi35xx != NULL) {
576 return OsalSpinLockIrqSave(&hi35xx->spin, &hi35xx->irqSave);
583 struct Hi35xxI2cCntlr *hi35xx = (struct Hi35xxI2cCntlr *)cntlr;
584 if (hi35xx != NULL) {
585 (void)OsalSpinUnlockIrqRestore(&hi35xx->spin, &hi35xx->irqSave);
594 static int32_t Hi35xxI2cReadDrs(struct Hi35xxI2cCntlr *hi35xx, const struct DeviceResourceNode *node)
605 ret = drsOps->GetUint32(node, "reg_pbase", &hi35xx->regBasePhy, 0);
611 ret = drsOps->GetUint16(node, "reg_size", &hi35xx->regSize, 0);
617 ret = drsOps->GetUint32(node, "freq", &hi35xx->freq, 0);
623 ret = drsOps->GetUint32(node, "irq", &hi35xx->irq, 0);
629 ret = drsOps->GetUint32(node, "clk", &hi35xx->clk, 0);
635 ret = drsOps->GetUint16(node, "bus", (uint16_t *)&hi35xx->bus, 0);
647 struct Hi35xxI2cCntlr *hi35xx = NULL;
649 hi35xx = (struct Hi35xxI2cCntlr *)OsalMemCalloc(sizeof(*hi35xx));
650 if (hi35xx == NULL) {
651 HDF_LOGE("%s: malloc hi35xx fail!", __func__);
655 ret = Hi35xxI2cReadDrs(hi35xx, node);
661 hi35xx->regBase = OsalIoRemap(hi35xx->regBasePhy, hi35xx->regSize);
662 if (hi35xx->regBase == NULL) {
668 ret = I2cDumperCreate(hi35xx);
674 Hi35xxI2cCntlrInit(hi35xx);
676 hi35xx->cntlr.priv = (void *)node;
677 hi35xx->cntlr.busId = hi35xx->bus;
678 hi35xx->cntlr.ops = &g_method;
679 hi35xx->cntlr.lockOps = &g_lockOps;
680 (void)OsalSpinInit(&hi35xx->spin);
681 ret = I2cCntlrAdd(&hi35xx->cntlr);
684 (void)OsalSpinDestroy(&hi35xx->spin);
689 (void)I2cAddVfsById(hi35xx->cntlr.busId);
693 if (hi35xx != NULL) {
694 if (hi35xx->regBase != NULL) {
695 OsalIoUnmap((void *)hi35xx->regBase);
696 hi35xx->regBase = NULL;
698 OsalMemFree(hi35xx);
699 hi35xx = NULL;
730 struct Hi35xxI2cCntlr *hi35xx = NULL;
745 I2cDumperDestroy(hi35xx);
750 hi35xx = (struct Hi35xxI2cCntlr *)cntlr;
751 OsalIoUnmap((void *)hi35xx->regBase);
752 (void)OsalSpinDestroy(&hi35xx->spin);
753 OsalMemFree(hi35xx);