dmac_hi35xx.c - OpenGrok cross reference for /device/soc/hisilicon/common/platform/dmac/dmac

Lines Matching defs:chanInfo
169 static int32_t HiDmacGetChanInfo(struct DmaCntlr *cntlr, struct DmacChanInfo *chanInfo, struct DmacMsg *msg)
178     if (chanInfo == NULL || msg == NULL) {
182     if (chanInfo->transType == TRASFER_TYPE_P2M || chanInfo->transType == TRASFER_TYPE_M2P) {
183         periphId = HiDmacGetPriId(DmacMsgGetPeriphAddr(msg), chanInfo->transType);
192         chanInfo->srcWidth = msg->srcWidth;
193         chanInfo->destWidth = chanInfo->srcWidth;
194         localSrcWidth = HiDmacToLocalWitdh(chanInfo->srcWidth, g_peripheral[periphId].transWidth);
196         chanInfo->config = g_peripheral[periphId].transCfg |
201     chanInfo->lliEnFlag = HIDMAC_LLI_ENABLE;
216 static int32_t HiDmacStartM2M(struct DmaCntlr *cntlr, struct DmacChanInfo *chanInfo,
223     if (chanInfo == NULL || len == 0) {
224         HDF_LOGE("%s: chanInfo null or invalid len:%zu", __func__, len);
228     OSAL_WRITEL(psrc & HIDMAC_32BITS_MASK, cntlr->remapBase + HIDMAC_CX_SRC_OFFSET_L(chanInfo->channel));
231         cntlr->remapBase + HIDMAC_CX_SRC_OFFSET_H(chanInfo->channel));
233     OSAL_WRITEL(0, cntlr->remapBase + HIDMAC_CX_SRC_OFFSET_H(chanInfo->channel));
236     OSAL_WRITEL(pdst & HIDMAC_32BITS_MASK, cntlr->remapBase + HIDMAC_CX_DST_OFFSET_L(chanInfo->channel));
239         cntlr->remapBase + HIDMAC_CX_DST_OFFSET_H(chanInfo->channel));
241     OSAL_WRITEL(0, cntlr->remapBase + HIDMAC_CX_DST_OFFSET_H(chanInfo->channel));
244     OSAL_WRITEL(0, cntlr->remapBase + HIDMAC_CX_LLI_OFFSET_L(chanInfo->channel));
245     OSAL_WRITEL(len, cntlr->remapBase + HIDMAC_CX_CNT0_OFFSET(chanInfo->channel));
246     OSAL_WRITEL(HIDMAC_CX_CFG_M2M, cntlr->remapBase + HIDMAC_CX_CFG_OFFSET(chanInfo->channel));
250 static int32_t HiDmacStartLli(struct DmaCntlr *cntlr, struct DmacChanInfo *chanInfo)
258     if (chanInfo == NULL || chanInfo->lli == NULL) {
259         HDF_LOGE("%s: chanInfo or lli is null", __func__);
262     plli = chanInfo->lli;
264     OSAL_WRITEL(plli->srcAddr & HIDMAC_32BITS_MASK, cntlr->remapBase + HIDMAC_CX_SRC_OFFSET_L(chanInfo->channel));
267         cntlr->remapBase + HIDMAC_CX_SRC_OFFSET_H(chanInfo->channel)); 
269     OSAL_WRITEL(0, cntlr->remapBase + HIDMAC_CX_SRC_OFFSET_H(chanInfo->channel)); 
272     OSAL_WRITEL(plli->destAddr & HIDMAC_32BITS_MASK, cntlr->remapBase + HIDMAC_CX_DST_OFFSET_L(chanInfo->channel));
275         cntlr->remapBase + HIDMAC_CX_DST_OFFSET_H(chanInfo->channel)); 
277     OSAL_WRITEL(0, cntlr->remapBase + HIDMAC_CX_DST_OFFSET_H(chanInfo->channel)); 
280     OSAL_WRITEL(plli->nextLli & HIDMAC_32BITS_MASK, cntlr->remapBase + HIDMAC_CX_LLI_OFFSET_L(chanInfo->channel));
283         cntlr->remapBase + HIDMAC_CX_LLI_OFFSET_H(chanInfo->channel));
285     OSAL_WRITEL(0, cntlr->remapBase + HIDMAC_CX_LLI_OFFSET_H(chanInfo->channel));
288     OSAL_WRITEL(plli->count, cntlr->remapBase + HIDMAC_CX_CNT0_OFFSET(chanInfo->channel));
290     OSAL_WRITEL(plli->config | HIDMAC_CX_CFG_CHN_START, cntlr->remapBase + HIDMAC_CX_CFG_OFFSET(chanInfo->channel));