Lines Matching defs:hi35xx
46 static inline void Hi35xxAdcSetIrq(const struct Hi35xxAdcDevice *hi35xx)
48 OSAL_WRITEL(0, hi35xx->regBase + HI35XX_ADC_INTR_EN);
51 static void Hi35xxAdcSetAccuracy(const struct Hi35xxAdcDevice *hi35xx)
56 if (hi35xx->dataWidth != 0 && hi35xx->dataWidth <= MAX_DATA_WIDTH) {
57 dataWidth = hi35xx->dataWidth;
63 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_ADC_ACCURACY);
66 static void Hi35xxAdcSetGlitchSample(const struct Hi35xxAdcDevice *hi35xx)
70 if (hi35xx->scanMode == CYCLE_MODE) {
71 val = (hi35xx->glitchSample == CYCLE_MODE) ? DEFAULT_GLITCHSAMPLE : hi35xx->glitchSample;
72 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_ADC_START);
73 val = OSAL_READL(hi35xx->regBase + HI35XX_ADC_START);
78 static void Hi35xxAdcSetTimeScan(const struct Hi35xxAdcDevice *hi35xx)
83 rate = hi35xx->rate;
84 if (hi35xx->scanMode == CYCLE_MODE) {
89 OSAL_WRITEL(timeScan, hi35xx->regBase + HI35XX_ADC_START);
90 timeScan = OSAL_READL(hi35xx->regBase + HI35XX_ADC_START);
95 static void Hi35xxAdcConfig(const struct Hi35xxAdcDevice *hi35xx)
103 validChannel = hi35xx->validChannel;
104 scanMode = hi35xx->scanMode;
105 delta = hi35xx->delta;
106 deglitch = hi35xx->deglitch;
114 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_ADC_CONFIG);
117 static inline void Hi35xxAdcStartScan(const struct Hi35xxAdcDevice *hi35xx)
119 OSAL_WRITEL(1, hi35xx->regBase + HI35XX_ADC_START);
122 static inline void Hi35xxAdcReset(const struct Hi35xxAdcDevice *hi35xx)
124 OSAL_WRITEL(CONFIG_REG_RESET_VALUE, hi35xx->regBase + HI35XX_ADC_CONFIG);
127 static void Hi35xxAdcSetPinCtrl(const struct Hi35xxAdcDevice *hi35xx)
132 validChannel = (hi35xx->validChannel & VALID_CHANNEL_MASK);
134 val = OSAL_READL(hi35xx->pinCtrlBase + HI35XX_ADC_IO_CONFIG_0);
136 OSAL_WRITEL(val, hi35xx->pinCtrlBase + HI35XX_ADC_IO_CONFIG_0);
140 val = OSAL_READL(hi35xx->pinCtrlBase + HI35XX_ADC_IO_CONFIG_1);
142 OSAL_WRITEL(val, hi35xx->pinCtrlBase + HI35XX_ADC_IO_CONFIG_1);
148 struct Hi35xxAdcDevice *hi35xx = NULL;
154 hi35xx = (struct Hi35xxAdcDevice *)device;
155 if (hi35xx->scanMode == CYCLE_MODE) {
156 Hi35xxAdcStartScan(hi35xx);
165 struct Hi35xxAdcDevice *hi35xx = NULL;
171 hi35xx = (struct Hi35xxAdcDevice *)device;
172 Hi35xxAdcStartScan(hi35xx);
174 if (hi35xx->scanMode != CYCLE_MODE) {
180 value = OSAL_READL(hi35xx->regBase + HI35XX_ADC_DATA0);
183 value = OSAL_READL(hi35xx->regBase + HI35XX_ADC_DATA1);
191 dataWidth = hi35xx->dataWidth;
199 struct Hi35xxAdcDevice *hi35xx = NULL;
205 hi35xx = (struct Hi35xxAdcDevice *)device;
206 if (hi35xx->scanMode == CYCLE_MODE) {
207 OSAL_WRITEL(1, hi35xx->regBase + HI35XX_ADC_STOP);
218 static void Hi35xxAdcDeviceInit(struct Hi35xxAdcDevice *hi35xx)
220 Hi35xxAdcReset(hi35xx);
221 Hi35xxAdcConfig(hi35xx);
222 Hi35xxAdcSetAccuracy(hi35xx);
223 Hi35xxAdcSetIrq(hi35xx);
224 Hi35xxAdcSetGlitchSample(hi35xx);
225 Hi35xxAdcSetTimeScan(hi35xx);
226 Hi35xxAdcSetPinCtrl(hi35xx);
227 HDF_LOGI("%s: device:%u init done", __func__, hi35xx->deviceNum);
230 static int32_t Hi35xxAdcReadDrs(struct Hi35xxAdcDevice *hi35xx, const struct DeviceResourceNode *node)
241 ret = drsOps->GetUint32(node, "regBasePhy", &hi35xx->regBasePhy, 0);
247 ret = drsOps->GetUint32(node, "regSize", &hi35xx->regSize, 0);
253 ret = drsOps->GetUint32(node, "deviceNum", &hi35xx->deviceNum, 0);
259 ret = drsOps->GetUint32(node, "dataWidth", &hi35xx->dataWidth, 0);
265 ret = drsOps->GetUint32(node, "validChannel", &hi35xx->validChannel, 0);
271 ret = drsOps->GetUint32(node, "scanMode", &hi35xx->scanMode, 0);
277 ret = drsOps->GetUint32(node, "delta", &hi35xx->delta, 0);
283 ret = drsOps->GetUint32(node, "deglitch", &hi35xx->deglitch, 0);
289 ret = drsOps->GetUint32(node, "glitchSample", &hi35xx->glitchSample, 0);
295 ret = drsOps->GetUint32(node, "rate", &hi35xx->rate, 0);
306 struct Hi35xxAdcDevice *hi35xx = NULL;
309 hi35xx = (struct Hi35xxAdcDevice *)OsalMemCalloc(sizeof(*hi35xx));
310 if (hi35xx == NULL) {
311 HDF_LOGE("%s: alloc hi35xx failed", __func__);
315 ret = Hi35xxAdcReadDrs(hi35xx, node);
321 hi35xx->regBase = OsalIoRemap(hi35xx->regBasePhy, hi35xx->regSize);
322 if (hi35xx->regBase == NULL) {
328 hi35xx->pinCtrlBase = OsalIoRemap(HI35XX_ADC_IO_CONFIG_BASE, HI35XX_ADC_IO_CONFIG_SIZE);
329 if (hi35xx->pinCtrlBase == NULL) {
335 Hi35xxAdcDeviceInit(hi35xx);
336 hi35xx->device.priv = (void *)node;
337 hi35xx->device.devNum = hi35xx->deviceNum;
338 hi35xx->device.ops = &g_method;
339 ret = AdcDeviceAdd(&hi35xx->device);
341 HDF_LOGE("%s: add adc device:%u failed", __func__, hi35xx->deviceNum);
347 if (hi35xx != NULL) {
348 if (hi35xx->regBase != NULL) {
349 OsalIoUnmap((void *)hi35xx->regBase);
350 hi35xx->regBase = NULL;
352 AdcDeviceRemove(&hi35xx->device);
353 OsalMemFree(hi35xx);
384 struct Hi35xxAdcDevice *hi35xx = NULL;
403 hi35xx = (struct Hi35xxAdcDevice *)device;
404 OsalIoUnmap((void *)hi35xx->regBase);
405 OsalMemFree(hi35xx);