Lines Matching defs:resp
136 struct VirtgpuCtrlHdr resp;
179 static bool NotifyAndWaitResponse(unsigned queue, struct Virtq *q, const void *req, volatile void *resp)
182 volatile struct VirtgpuCtrlHdr *b = resp;
205 static bool RequestResponse(unsigned queue, const void *req, size_t reqSize, volatile void *resp, size_t respSize)
216 q->desc[idx].pAddr = u32_to_u64(VMM_TO_DMA_ADDR((VADDR_T)resp));
220 return NotifyAndWaitResponse(queue, q, req, resp);
224 size_t dataSize, volatile void *resp, size_t respSize)
239 q->desc[idx].pAddr = u32_to_u64(VMM_TO_DMA_ADDR((VADDR_T)resp));
243 return NotifyAndWaitResponse(0, q, req, resp);
285 struct VirtgpuRespDisplayInfo resp = { 0 };
287 if (!RequestResponse(0, &req, sizeof(req), &resp, sizeof(resp))) {
291 if (resp.pmodes[0].enabled) {
292 g_virtGpu->screen = resp.pmodes[0].r;
321 struct VirtgpuRespEdid resp = { 0 };
323 if (!RequestResponse(0, &req, sizeof(req), &resp, sizeof(resp))) {
347 struct VirtgpuCtrlHdr resp = { 0 };
349 return RequestResponse(0, &req, sizeof(req), &resp, sizeof(resp));
365 struct VirtgpuCtrlHdr resp = { 0 };
367 return RequestResponse(0, &req, sizeof(req), &resp, sizeof(resp));
379 struct VirtgpuCtrlHdr resp = { 0 };
381 return RequestResponse(0, &req, sizeof(req), &resp, sizeof(resp));
391 struct VirtgpuCtrlHdr resp = { 0 };
393 return RequestResponse(0, &req, sizeof(req), &resp, sizeof(resp));
419 struct VirtgpuCtrlHdr resp = { 0 };
421 return RequestDataResponse(&req, sizeof(req), &data, sizeof(data), &resp, sizeof(resp));
454 q->desc[i + 1].pAddr = u32_to_u64(VMM_TO_DMA_ADDR((VADDR_T)&g_virtGpu->resp));
455 q->desc[i + 1].len = sizeof(g_virtGpu->resp);