Lines Matching refs:desc
183 /* always use desc[0] [1] ([2]) for request-wait-response */
210 q->desc[idx].pAddr = VMM_TO_DMA_ADDR((VADDR_T)req);
211 q->desc[idx].len = reqSize;
212 q->desc[idx].flag = VIRTQ_DESC_F_NEXT;
213 q->desc[idx].next = idx + 1;
215 q->desc[idx].pAddr = VMM_TO_DMA_ADDR((VADDR_T)resp);
216 q->desc[idx].len = respSize;
217 q->desc[idx].flag = VIRTQ_DESC_F_WRITE;
228 q->desc[idx].pAddr = VMM_TO_DMA_ADDR((VADDR_T)req);
229 q->desc[idx].len = reqSize;
230 q->desc[idx].flag = VIRTQ_DESC_F_NEXT;
231 q->desc[idx].next = idx + 1;
233 q->desc[idx].pAddr = VMM_TO_DMA_ADDR((VADDR_T)data);
234 q->desc[idx].len = dataSize;
235 q->desc[idx].flag = VIRTQ_DESC_F_NEXT;
236 q->desc[idx].next = idx + 1;
238 q->desc[idx].pAddr = VMM_TO_DMA_ADDR((VADDR_T)resp);
239 q->desc[idx].len = respSize;
240 q->desc[idx].flag = VIRTQ_DESC_F_WRITE;
249 uint16_t head = q->last % q->qsz; /* `last` record next writable desc entry for request */
257 q->desc[head].pAddr = VMM_TO_DMA_ADDR((VADDR_T)req);
258 q->desc[head].len = reqSize;
449 q->desc[i].flag = VIRTQ_DESC_F_NEXT;
450 q->desc[i].next = i + 1;
451 q->desc[i + 1].pAddr = VMM_TO_DMA_ADDR((VADDR_T)&g_virtGpu->resp);
452 q->desc[i + 1].len = sizeof(g_virtGpu->resp);
453 q->desc[i + 1].flag = VIRTQ_DESC_F_WRITE;