Lines Matching defs:rsState

36     uintptr_t instStart, uintptr_t instEnd, RegLocState &rsState)

40 rsState.pcStart = pcOffset;
41 backupRsState_ = rsState;
45 rsState.pcEnd = pcOffset;
49 rsState.pcEnd = fde.pcEnd;
52 rsState.pcStart = pcOffset;
60 if (!DecodeDwCfa(opCode, cie, pcOffset, instPtr, rsState)) {
64 DFXLOGU("rsState pcStart=%{public}" PRIx64 ", pcEnd=%{public}" PRIx64 "",
65 (uint64_t)rsState.pcStart, (uint64_t)rsState.pcEnd);
70 uintptr_t& pcOffset, uintptr_t& instPtr, RegLocState &rsState)
111 rsState.locs[qutIdx].type = REG_LOC_MEM_OFFSET;
112 rsState.locs[qutIdx].val = offset;
121 rsState.locs[qutIdx] = backupRsState_.locs[qutIdx];
126 if (reg == rsState.returnAddressRegister) {
127 rsState.returnAddressUndefined = true;
133 rsState.locs[qutIdx].type = REG_LOC_UNDEFINED; // cfa offset
138 if (reg == rsState.returnAddressRegister) {
139 rsState.returnAddressSame = true;
145 rsState.locs[qutIdx].type = REG_LOC_UNUSED;
156 rsState.locs[qutIdx].type = REG_LOC_REGISTER; // register is saved in current register
157 rsState.locs[qutIdx].val = static_cast<intptr_t>(reg2);
160 saveRsStates_.push(rsState);
167 rsState = saveRsStates_.top();
175 rsState.cfaReg = (uint32_t)reg;
176 rsState.cfaRegOffset = (int32_t)offset;
181 rsState.cfaReg = (uint32_t)reg;
185 rsState.cfaRegOffset = (int32_t)memory_->ReadUleb128(instPtr);
186 DFXLOGU("DW_CFA_def_cfa_offset: cfaRegOffset=%{public}d", rsState.cfaRegOffset);
195 rsState.locs[qutIdx].type = REG_LOC_MEM_OFFSET;
196 rsState.locs[qutIdx].val = offset;
201 DFXLOGU("DW_CFA_def_cfa_sf: reg=%{public}d, offset=%{public}d", rsState.cfaReg, rsState.cfaRegOffset);
202 rsState.cfaReg = (uint32_t)reg;
203 rsState.cfaRegOffset = (int32_t)offset;
207 rsState.cfaRegOffset = (int32_t)offset;
208 DFXLOGU("DW_CFA_def_cfa_offset_sf: offset=%{public}d", rsState.cfaRegOffset);
218 rsState.locs[qutIdx].type = REG_LOC_VAL_OFFSET;
219 rsState.locs[qutIdx].val = offset;
229 rsState.locs[qutIdx].type = REG_LOC_VAL_OFFSET;
230 rsState.locs[qutIdx].val = offset;
233 rsState.cfaReg = 0;
234 rsState.cfaExprPtr = instPtr;
242 rsState.locs[qutIdx].type = REG_LOC_MEM_EXPRESSION;
243 rsState.locs[qutIdx].val = static_cast<intptr_t>(instPtr);
252 rsState.locs[qutIdx].type = REG_LOC_VAL_EXPRESSION;
253 rsState.locs[qutIdx].val = static_cast<intptr_t>(instPtr);
271 rsState.locs[qutIdx].type = REG_LOC_MEM_OFFSET;
272 rsState.locs[qutIdx].val = offset;
291 rsState.locs[qutIdx].type = REG_LOC_MEM_OFFSET;
292 rsState.locs[qutIdx].val = offset;
301 rsState.locs[qutIdx] = backupRsState_.locs[qutIdx];
311 bool DwarfCfaInstructions::Parse(uintptr_t pc, FrameDescEntry fde, RegLocState &rsState)
314 rsState.returnAddressRegister = cie.returnAddressRegister;
317 if (!Iterate(pc, fde, cie.instructionsOff, cie.instructionsEnd, rsState)) {
323 if (!Iterate(pc, fde, fde.instructionsOff, fde.instructionsEnd, rsState)) {