Lines Matching refs:regs

36     regsData_[REG_AARCH64_X0] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X0]);
37 regsData_[REG_AARCH64_X1] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X1]);
38 regsData_[REG_AARCH64_X2] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X2]);
39 regsData_[REG_AARCH64_X3] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X3]);
40 regsData_[REG_AARCH64_X4] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X4]);
41 regsData_[REG_AARCH64_X5] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X5]);
42 regsData_[REG_AARCH64_X6] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X6]);
43 regsData_[REG_AARCH64_X7] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X7]);
44 regsData_[REG_AARCH64_X8] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X8]);
45 regsData_[REG_AARCH64_X9] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X9]);
46 regsData_[REG_AARCH64_X10] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X10]);
47 regsData_[REG_AARCH64_X11] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X11]);
48 regsData_[REG_AARCH64_X12] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X12]);
49 regsData_[REG_AARCH64_X13] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X13]);
50 regsData_[REG_AARCH64_X14] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X14]);
51 regsData_[REG_AARCH64_X15] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X15]);
52 regsData_[REG_AARCH64_X16] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X16]);
53 regsData_[REG_AARCH64_X17] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X17]);
54 regsData_[REG_AARCH64_X18] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X18]);
55 regsData_[REG_AARCH64_X19] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X19]);
56 regsData_[REG_AARCH64_X20] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X20]);
57 regsData_[REG_AARCH64_X21] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X21]);
58 regsData_[REG_AARCH64_X22] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X22]);
59 regsData_[REG_AARCH64_X23] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X23]);
60 regsData_[REG_AARCH64_X24] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X24]);
61 regsData_[REG_AARCH64_X25] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X25]);
62 regsData_[REG_AARCH64_X26] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X26]);
63 regsData_[REG_AARCH64_X27] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X27]);
64 regsData_[REG_AARCH64_X28] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X28]);
65 regsData_[REG_AARCH64_X29] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X29]);
66 regsData_[REG_AARCH64_X30] = static_cast<uintptr_t>(context.uc_mcontext.regs[REG_AARCH64_X30]);
71 void DfxRegsArm64::SetFromFpMiniRegs(const uintptr_t* regs, const size_t size)
76 regsData_[REG_FP] = regs[0]; // 0 : fp offset
77 regsData_[REG_LR] = regs[1]; // 1 : lr offset
78 regsData_[REG_SP] = regs[2]; // 2 : sp offset
79 regsData_[REG_PC] = regs[3]; // 3 : pc offset
82 void DfxRegsArm64::SetFromQutMiniRegs(const uintptr_t* regs, const size_t size)
87 regsData_[REG_AARCH64_X20] = regs[1]; // 1 : X20 offset
88 regsData_[REG_AARCH64_X28] = regs[2]; // 2 : X28 offset
89 regsData_[REG_FP] = regs[3]; // 3 : fp offset
90 regsData_[REG_SP] = regs[4]; // 4 : sp offset
91 regsData_[REG_PC] = regs[5]; // 5 : pc offset
92 regsData_[REG_LR] = regs[6]; // 6 : lr offset
108 auto regs = GetRegsData();
111 regs[REG_AARCH64_X0], regs[REG_AARCH64_X1], regs[REG_AARCH64_X2], regs[REG_AARCH64_X3]);
114 regs[REG_AARCH64_X4], regs[REG_AARCH64_X5], regs[REG_AARCH64_X6], regs[REG_AARCH64_X7]);
117 regs[REG_AARCH64_X8], regs[REG_AARCH64_X9], regs[REG_AARCH64_X10], regs[REG_AARCH64_X11]);
120 regs[REG_AARCH64_X12], regs[REG_AARCH64_X13], regs[REG_AARCH64_X14], regs[REG_AARCH64_X15]);
123 regs[REG_AARCH64_X16], regs[REG_AARCH64_X17], regs[REG_AARCH64_X18], regs[REG_AARCH64_X19]);
126 regs[REG_AARCH64_X20], regs[REG_AARCH64_X21], regs[REG_AARCH64_X22], regs[REG_AARCH64_X23]);
129 regs[REG_AARCH64_X24], regs[REG_AARCH64_X25], regs[REG_AARCH64_X26], regs[REG_AARCH64_X27]);
132 regs[REG_AARCH64_X28], regs[REG_AARCH64_X29]);
135 regs[REG_AARCH64_X30], regs[REG_SP], regs[REG_PC]);