Lines Matching defs:bbGatesAddrToIdx
122 const std::unordered_map<GateRef, size_t> &bbGatesAddrToIdx)
128 if (bbGatesAddrToIdx.count(predGate) == 0) {
192 const std::unordered_map<GateRef, size_t> &bbGatesAddrToIdx,
204 bool isDom = isAncestor(bbGatesAddrToIdx.at(*use), bbGatesAddrToIdx.at(curGate));
229 const std::unordered_map<GateRef, size_t> &bbGatesAddrToIdx,
242 auto a = bbGatesAddrToIdx.at(circuit->GetIn(predGate, 0));
243 auto b = bbGatesAddrToIdx.at(circuit->GetIn(circuit->GetIn(fixedGate, 0),
252 LOG_COMPILER(ERROR) << "BB_" << bbGatesAddrToIdx.at(circuit->GetIn(predGate, 0))
254 << bbGatesAddrToIdx.at(circuit->GetIn(circuit->GetIn(fixedGate, 0),
386 const std::unordered_map<GateRef, size_t> &bbGatesAddrToIdx,
393 if (!Scheduler::CalculateSchedulingUpperBound(circuit, bbGatesAddrToIdx, isAncestor,
401 Scheduler::CalculateSchedulingLowerBound(circuit, bbGatesAddrToIdx, lowestCommonAncestor, lowerBound);
488 std::unordered_map<GateRef, size_t> bbGatesAddrToIdx;
490 Scheduler::CalculateDominatorTree(circuit, bbGatesList, bbGatesAddrToIdx, immDom);
497 if (!RunCFGSoundnessCheck(circuit, bbGatesList, bbGatesAddrToIdx)) {
572 if (!RunCFGReducibilityCheck(circuit, bbGatesList, bbGatesAddrToIdx, isAncestor)) {
586 if (!RunFixedGatesRelationsCheck(circuit, fixedGatesList, bbGatesAddrToIdx, isAncestor)) {
611 if (!RunSchedulingBoundsCheck(circuit, schedulableGatesList, bbGatesAddrToIdx, isAncestor, lowestCommonAncestor)) {