Lines Matching refs:shift
290 uint32_t shift = GetShiftOfLdr(operand, scale, regX);
295 uint32_t shiftField = (shift << LDR_STR_S_LOWBITS) & LDR_STR_S_MASK;
391 for (unsigned int shift = 0; shift < regSize; shift += HWORDSIZE) {
392 const unsigned int halfWord = (immValue >> shift) & HWORD_MASK;
418 for (unsigned int shift = 0; shift < regSize; shift += HWORDSIZE) {
419 uint64_t shiftedMask = (HWORD_MASK << shift);
438 const uint64_t movkImm = (realImm & shiftedMask) >> shift;
439 Movk(rd, movkImm, shift);
509 for (int shift = 0; shift < RegXSize; shift += HWORDSIZE) {
510 int64_t himm = (imm >> shift) & HWORD_MASK;
516 startIdx = shift;
518 endIdx = shift;
541 for (int shift = 0; shift < RegXSize; shift += HWORDSIZE) {
542 uint64_t himm = (imm >> shift) & HWORD_MASK;
545 if ((shift < startIdx || endIdx < shift) && himm != outside) {
546 orrImm = UpdateImm(orrImm, shift, outside == 0);
548 firstMovkShift = shift;
550 secondMovkShift = shift;
552 } else if (shift > startIdx && shift < endIdx && himm != inside) {
553 orrImm = UpdateImm(orrImm, shift, outside == 0);
555 firstMovkShift = shift;
557 secondMovkShift = shift;
592 int shift = 0;
595 for (; shift < RegXSize; shift += HWORDSIZE) {
596 imm16 = (imm >> shift) & HWORD_MASK;
602 Movk(rd, imm16, shift);
608 for (shift += HWORDSIZE; shift < RegXSize; shift += HWORDSIZE) {
609 imm16 = (imm >> shift) & HWORD_MASK;
614 Movk(rd, imm16, shift);
658 void AssemblerAarch64::Movz(const Register &rd, uint64_t imm, int shift)
660 MovWide(MoveOpCode::MOVZ, rd, imm, shift);
663 void AssemblerAarch64::Movk(const Register &rd, uint64_t imm, int shift)
665 MovWide(MoveOpCode::MOVK, rd, imm, shift);
668 void AssemblerAarch64::Movn(const Register &rd, uint64_t imm, int shift)
670 MovWide(MoveOpCode::MOVN, rd, imm, shift);
673 void AssemblerAarch64::MovWide(uint32_t op, const Register &rd, uint64_t imm, int shift)
676 uint32_t hw_field = ((shift / 16) << MOV_WIDE_Hw_LOWBITS) & MOV_WIDE_Hw_MASK;
762 void AssemblerAarch64::Lsr(const Register &rd, const Register &rn, unsigned shift)
767 // LSR <Wd>, <Wn>, #<shift> is equivalent to UBFM <Wd>, <Wn>, #<shift>, #31
771 // LSR <Xd>, <Xn>, #<shift> is equivalent to UBFM <Xd>, <Xn>, #<shift>, #63
774 Ubfm(rd, rn, shift, imms);
855 uint32_t shift = 0;
859 shift = 1;
865 uint32_t shift_field = (shift << ADD_SUB_Sh_LOWBITS) & ADD_SUB_Sh_MASK;
1232 uint32_t shift = 0;
1234 shift = operand.GetShiftOption() != Shift::NO_SHIFT;
1236 shift = operand.GetShiftAmount();
1237 ASSERT(shift == 0 || shift == 1);
1238 shift = (shift == 0) ? 0 : 1;
1240 shift = operand.GetShiftAmount();
1243 ASSERT(shift == 0 || shift == 3);
1246 ASSERT(shift == 0 || shift == 2);
1248 shift = (shift == 0) ? 0 : 1;
1250 return shift;