Lines Matching refs:rm
291 Register rm = operand.GetRegisterOffset();
297 uint32_t instructionCode = ((regX && (scale == Scale::Q)) << 30) | op | Rm(rm.GetId()) |
459 void AssemblerAarch64::Mov(const Register &rd, const Register &rm)
461 if (rd.IsSp() || rm.IsSp()) {
462 Add(rd, rm, Operand(Immediate(0)));
464 Orr(rd, Register(Zero), Operand(rm));
730 void AssemblerAarch64::Lsl(const Register &rd, const Register &rn, const Register &rm)
732 uint32_t code = Sf(!rd.IsW()) | LSL_Reg | Rm(rm.GetId()) | Rn(rn.GetId()) | Rd(rd.GetId());
736 void AssemblerAarch64::Lsr(const Register &rd, const Register &rn, const Register &rm)
738 uint32_t code = Sf(!rd.IsW()) | LSR_Reg | Rm(rm.GetId()) | Rn(rn.GetId()) | Rd(rd.GetId());